The UNIVAC 418 Computer
Unisys History Newsletter.
Volume 4, Number 2
by George Gray
The typical computer of the 1950s, large or small, was engaged in batch processing, such as maintaining accounts or keeping track of inventories. Data came in and went out on punched cards, paper tape, or magnetic tape. Toward the end of the 1950s, computer development reached a point where computers could become part of real-time communications networks, performing tasks such as message switching, airline reservations, and on-line updating of bank accounts. In 1958, Sperry Rand's vacuum tube UNIVAC File Computer was one of the first to be used for airline reservations processing. A few years later, after transistors had replaced vacuum tubes as the technology for computer processors, a modified version of the computer produced for the Navy Tactical Data System in 1961 was sold as the UNIVAC 490 and used for various real-time applications.
During the early 1960s, the St. Paul division of Sperry Rand developed a medium-size real-time computer which was called the UNIVAC 418. The name came from its four microsecond memory cycle time and 18-bit word. It evolved from the Control Unit Tester (CUT), a device used in the factory to test the peripheral equipment for larger UNIVAC systems. In 1962, Westinghouse Electric expressed interest in using the 418 as an industrial process control computer, and a modified version was used in the Westinghouse PRODAC 510 and 580 machines. The 418 went through three stages of development, and approximately 400 machines had been produced by the mid-1970s.
The original version of the 418 was called the 418-I. It had from 4,096 to 16,384 words of core memory with the four microsecond cycle time. A basic system had eight input/output channels, and up to eight more could be added. The processor had two 18-bit arithmetic registers, A-upper (AU) and A-lower (AL), which could either be used independently or as one register for double-word operations. There were eight index registers and an index control register which was used to designate which of the eight index registers was to be used at any given moment. Given the relatively small word size, the 418's instruction format only allowed 12 bits for memory address which could only address 4,096 words. To deal with this limitation, the processor also had a 6-bit special register (SR) which was used for address augmentation. Its high-order bit in the was a control bit, while the remaining five bits could be used as the high-order bits in a 17-bit address composed of those five plus the 12 bits from the address field of the instruction. By this mechanism, addresses up to 131,072 words could be referenced.
There were three types of instructions. Type I and Type II instructions were composed of a 6-bit function code and a 12-bit address field. Type I instructions were sensitive to the value in the leading bit of the SR. If it was set, the other five bits of the SR were used to obtain 17-bit addressing; if it was not set, the needed five bits were taken from a separate instruction address register (IAR). In Type II instructions, the high-order five bits for the address were always taken from the IAR. In some Type II instructions, the contents of 12-bit address field were used as an immediate operand, rather than an address. Type III instructions were made up of a 6-bit function code, a 6-bit minor function code, and a 6-bit data field. Input/output instructions used the Type III format, and many of them assumed that the two words following the instruction contained buffer control information. The instruction set included instructions for fixed-point arithmetic, comparisons, and shifting of 18-bit operands. There were also instructions for double-word addition, subtraction, and shifting.
The first 418 was delivered in June 1963, and six were produced. UNIVAC programmers developed a Real Time Executive (called EXEC) for the 418, which was ready in March 1964. It could handle the central complex (processor and memory) and had i/o handlers for the 1004 card processor, the FH-220 drum, UNISERVO IIIC tape drives, and communications devices. The 1218 was the military version of the 418. It was used in the shipboard fire control system for the Navy's Talos missile and the Army's War Room Information System. The 1218 was also used as the basis for the Automated Radar Tracking System (ARTS-I) deployed for the Federal Aviation Agency at the Atlanta airport in 1966.
The development of a faster memory module with a two microsecond cycle time resulted in the 418-II system. The model II processor could utilize up to 16 memory modules, for up to 65,536 words of core storage. The EXEC had been modified to handle a greater range of peripheral devices, including the FH-330 drum (262,144 words), the FH-880 drum (1,572,864 words), the FASTRAND II bulk storage drum, and the UNISERVO VIC tape drives. Since the 418 was primarily intended for real-time and communications applications, a wide range of data communications equipment could be connected to it. The Communications Terminal Module Controller (CMTC) controlled up to 16 Communication Terminal Module (CTM) units. Each CTM could handle two input and two output lines, giving the CTMC a capacity of 32 input and 32 output lines. The CTMs accommodated transmission speeds up to 50,000 bits per second.
The first 418-II was delivered in November 1964, and 249 were produced. Early 418 users included NASA, the Federal Telecommunications System, the Department of Defense AUTODIN communications system (which had 18 machines installed by 1967), the New York and Louisiana state police, the Navy Medical Data Services Center, and the California Department of Water Resources. In 1967, the Fuji Bank in Japan began operation of a major savings account system on three 418s. The Illinois Bell Telephone Company installed a 418 in 1967 to manage telephone operator assistance. The military version of the 418-II was designated the 1219. It had a memory cycle time of 2 microseconds. Two 1219s controlled the ARTS-Ia radar system for the New York City airports which went into operation in 1969. However, when this system was revised to become ARTS-III, which was deployed at some 70 U.S. airports beginning in May 1971, it was based on the UNIVAC 490, not the 418.
The 418-III was a greatly improved version, utilizing design features and components from the UNIVAC 1108 multiprocessor system. The 418-III was announced on June 5, 1968 and delivered in 1969. It provided for multiprocessing in the form of separate instruction and input/output processors. There was one instruction processor (command/arithmetic unit) and one or two input-output modules (IOMs). An IOM could have eight, twelve, or sixteen i/o channels. Memory consisted of two to four banks, each of which was 16,384 or 32,768 words, giving a maximum of 131,072 words. The memory access time was reduced to 750 nanoseconds. The instruction set was expanded to add floating-point arithmetic, binary-to-decimal and decimal-to-binary conversions, and a block transfer instruction for movement of up to 64 words at a time. The 418-III supported a variety of peripheral devices, including:
FH-432 Drum 524,288 words FH-1782 Drum 4,194,304 words FH-880 Drum 1,572,864 words FASTRAND II Unit 44,040,192 words UNISERVO VIC Tape UNISERVO VIIIC Tape High Speed Printer Paper Tape Reader Paper Tape Punch UNIVAC 9000 Series Computer Communications Terminal Module Controller (CTMC)
These features greatly increased the capabilities of the 418, but also its price: the central complex alone cost over $250,000 with disks, tapes, and printers adding even more. However, there was still a need for medium-scale real-time computers, and by 1976, some 137 418-III systems had been produced. After the 418-III, Sperry Rand made no more enhancements to this architecture, and the machines were gradually phased out by customers. In the 1990s, all the 418 hardware was gone, but the California Department of Water Resources was still running 418 emulation on a UNIVAC 1100/60 computer.
Unisys, UNIVAC, FASTRAND, and UNISERVO are registered trademarks of Unisys Corporation.
Copyright 2000, 2003 by George Gray